Transactional Memory
Outline
- Introduction
- Hardware Transactional Memory
- Intel TSX
- Others
- Software Transactional Memory
- TinySTM
- RSTM
- Compilers
- Benchmarks
- STAMP
- Others
Introduction
Transactional Memory is new synchronization mechanism proposed as an alternative for locks. The main purpose is to make easier the concurrent programming.Hardware Transactional Memory
Intel Transactional Synchronization Extensions (TSX)
Intel TSX is a new instructions set for Hardware Restricted Transactional Memory (RTM) and Hardware Lock Elision (HLE). It will be integrated with the next generation processor named Haswell in March-June 2013. The full specification can be found inside the new AVX Intel Architecture Instruction Set Extensions Programming Reference (also named 319433-012). Note: Restricted seems to mean that in the future the instructions set (ISA) will evolve to provide unrestricted HTM. Information about the implementation are not published yet.
How to use Intel TSX?In Linux, binutils 2.22.52+ (particularly gas, GNU assembler) already supports the new instructions so it makes really to use them. Nasm 2.10 also supports TSX instructions. GCC 4.8 will also support RTM and HLE via builtins (already available in the development branch of GCC).
Here some macros you can use Intel TSX/RTM.